1. Field of the Invention
The invention relates in general to a liquid crystal display and driving circuit thereof, and more particularly to a liquid crystal display, in which a shift register in a class of driving circuit is controlled to enable according to an output signal of a former class of driving circuit and an output signal of the class of driving circuit in a gate driver, and driving circuit.
2. Description of the Related Art
FIG. 1A is a block diagram showing a conventional structure of a liquid crystal display. Referring to FIG. 1A, the liquid crystal display 100 includes a gate driver 110, a pixel matrix 120, a data driver 130 and a timing controller 140. The gate driver 110 includes a first shift register 112, a second shift register 112, . . . , and an n-th shift register 112, wherein n is a positive integer greater than 1. The p-th (1≦p≦n) shift register 112 outputs a gate pulse Gp according to a clock signal CLK and a start pulse STP (p=1) outputted by the timing controller 140 or a gate pulse G(p−1) (p≠1), so as to turn on a p-th row of pixels (not shown) of the pixel matrix 120 to receive pixel data signals outputted by the data driver 130.
FIG. 1B is a diagram showing partial circuits of the shift register of FIG. 1A. Referring to FIG. 1B, the typical shift register 112 includes a logic device such as an inverter 114. The inverter 114 includes two N-type metal oxide semiconductor (NMOS) transistors T1 and T2. When the input signal Sin is at a high level, the transistor T2 is turned on such that the output signal Sout has a low level. When the input signal Sin is at a low level, the transistor T2 is turned off. At this time, because the gate of the transistor T1 is coupled to the drain of the transistor T1 to form an equivalent resistor, the operation voltage VDD of the shift register 112 boosts the output signal Sout to a high level, and the effect of signal inverting is thus generated.
However, the transistors T1 and T2 are a single type of NMOS design but not the complementary metal oxide semiconductor (CMOS) architecture. Thus, even if the transistor T2 is turned off, the transistor T2 still has a leakage current IL outputted by the operation voltage VDD. Because the gate driver 110 has the leakage current phenomenon in each class of shift register 112 during the operation, the power consumption of the liquid crystal display 100 is thus increased.